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14-bit Sigma-Delta-ADC

Features

  • Fully integrated high precision analog-to-digital converter
  • VDD = 1.5V with 3.3V digital interface, Low power consumption
  • Input bandwidth: 200kHz
  • SPI-compatible interface
  • Fast conversion speed, 14-bit ENOB @ 500kSPS (parallel)
  • Programmable output data rate and resolution

General Description

IMST developed a discrete high resolution 14-bit Δ∑-ADC with a high output data
rate. The complete ADC is fully integrated and designed in a 130nm-CMOS Technology (1.5V). No external passive components are required. The ADC architecture employs a 2nd-order sigma-delta modulator with a single-bit output data stream. The following digital part consists of a 3-stage digital filtering and offset / gain correction for the sigma-delta modulator.

By controlling the conversion speed and the resolution trough an SPI-compatible serial interface, the Δ∑-ADC is very interesting for a wide area of applications.

Block diagram


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